Search results for " Hard"
showing 10 items of 680 documents
F-contractions of Hardy–Rogers-type and application to multistage decision
2016
We prove fixed point theorems for F-contractions of Hardy–Rogers type involving self-mappings defined on metric spaces and ordered metric spaces. An example and an application to multistage decision processes are given to show the usability of the obtained theorems.
Impact of the erase algorithms on flash memory lifetime
2017
This paper presents a comparative study on the impact of the erase algorithm on flash memory lifetime, to demonstrate how the reduction of overall stress, suffered by memories, will increase their lifetime, thanks to a smart management of erase operations. To this purpose a fixed erase voltage, equal to the maximum value and the maximum time-window, was taken as the reference test; while an algorithm with adaptive voltage levels and the same overall time-window was designed and implemented in order to compare their experimental results. This study was carried out by using an innovative Automated Test Equipment, named Portable-ATE, tailored for Memory Test Chip and designed for performance e…
Enabling partially reconfigurable IP cores parameterisation and integration using MARTE and IP-XACT
2012
International audience; This paper presents a framework which facilitates the parameterization and integration of IP cores into partially reconfigurable SoC platforms, departing from a high-level of abstraction. The approach is based in a Model-Driven Engineering (MDE) methodology, which exploits two widely used standards for Systems-on-Chip specification, MARTE and IP-XACT. The presented work deals with the deployment level of the MDE approach, in which the abstract components of the platform are first linked to the lower level IP-XACT counterparts. At this phase, information for parameterization and integration is readily available, and a synthesizable model can be obtained from the gener…
Evolution of application-specific cache mappings
2020
Reconfigurable caches offer an intriguing opportunity to tailor cache behavior to applications for better run-times and energy consumptions. While one may adapt structural cache parameters such as cache and block sizes, we adapt the memory-address-to-cache-index mapping function to the needs of an application. Using a LEON3 embedded multi-core processor with reconfigurable cache mappings, a metaheuristic search procedure, and MiBench applications, we show in this work how to accurately compare non-deterministic performances of applications and how to use this information to implement an optimization procedure that evolves application-specific cache mappings for the LEON3 multi-core processo…
Multi-application Based Fault-Tolerant Network-on-Chip Design for Mesh Topology Using Reconfigurable Architecture
2019
In this paper, we propose a two-step fault-tolerant approach to address the faults occurred in cores. In the first stage, a Particle Swarm Optimization (PSO) based approach has been proposed for the fault-tolerant mapping of multiple applications on to the mesh based reconfigurable architecture by introducing spare cores and a heuristic has been proposed for the reconfiguration in the second stage. The proposed approach has been experimented by taking several benchmark applications into consideration. Communication cost comparisons have been carried out by taking the failed cores as user input and the experimental results show that our approach could get improvements in terms of communicati…
C-switches: Increasing switch radix with current integration scale
2011
In large switch-based interconnection networks, increasing the switch radix results in a decrease in the total number of network components, and consequently the overall cost of the network can be significantly reduced. Moreover, high-radix switches are an attractive option to improve the network performance in terms of latency, since hop count is also reduced. However, there are some problems related to the integration scale to design such single-chip switches. In this paper we discuss key issues and evaluate an interesting alternative for building high-radix switches going beyond the integration scale bounds. The idea basically consists in combining several current smaller single-chip swi…
Reactive Sintering of molybdenum disilicide by Spark Plasma Sintering from mechanically activated powder mixtures: Processing parameters and properti…
2008
Abstract Dense molybdenum disilicide with a nano-organized microstructure was synthesized by mechanical activation, by producing nanostructured agglomerates of a 1:2 mixture of Mo and Si, followed by the synthesis/consolidation in one step using SPS technology. In order to synthesize a dense molybdenum disilicide with a perfectly controlled microstructure, an investigation of the influence of Spark Plasma Sintering processing parameters (temperature, heating rate, mechanical pressure and holding time) on the chemical composition and the microstructure characteristics has been performed. The present work shows also that the so-obtained materials present better oxidation resistance in compari…
SiC Power Switches Evaluation for Space Applications Requirements
2016
We have evaluated several SiC power switches available on the market, by defining and performing a global test campaign oriented to Space applications requirements, in order to define their main benefits but also the limits of current SiC technology. This allowed to identify a number of target applications where SiC could be used as a technology push for a new generation of space electronics units. Silicon devices qualified for space systems above 600V for the switches and 1200V for the rectifiers are not available due to performances limitations of Si. Among the typical static and dynamic characterization, we have performed temperature and power stress and HTRB tests. More remarkably, we h…
Accumulation of radiation defects and modification of micromechanical properties under MgO crystal irradiation with swift 132Xe ions
2020
This work has been carried out within the framework of the EUROfusion Consortium and has received funding from the Euratom research and training programme 2014-2018 and 2019-2020 under grant agreement No. 633053. The views and opinions expressed herein do not necessarily reflect those of the European Commission. A.A. also acknowledges support via the project GF AP05134257 of Ministry of Education and Science of the Republic of Kazakhstan .
Radiation hardness studies of CdTe and for the SIXS particle detector on-board the BepiColombo spacecraft
2009
Abstract We report of the radiation hardness measurements that were performed in the developing work of a particle detector on-board ESA's forthcoming BepiColombo spacecraft. Two different high- Z semiconductor compounds, cadmium telluride (CdTe) and mercuric iodide (HgI 2 ), were irradiated with 22 MeV protons in four steps to attain the estimated total dose of 10 12 p / cm 2 for the mission time. The performance of the detectors was studied before and after every irradiation with radioactive 55 Fe source Mn K α 5.9 keV emission line. We studied the impact of the proton beam exposure on detector leakage current, energy resolution and charge collection efficiency (CCE). Also the reconstruct…